Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
UBPW CD4069UBPWR CD4069UBPWR CD4069UBNSR CD4069UBNSR CD4070BE CD4070BM CD4070BM96 CD4070BNSR CD4070BNSR CD4071BE CD4071BM CD4071BM96 CD4071BPW CD4071BPWR CD4071BNSR CD4071BNSR CD4073BE CD4073BM CD4073BM96 CD4073BNSR CD4073BNSR CD4076BE CD4076BM CD4076BM96 CD4077BE CD4077BM CD4077BM96 CD4077BNSR CD4077BNSR CD4081BE CD4081BM CD4081BM96 CD4081BPW CD4081BPWR CD4081BNSR CD4081BNSR CD4082BE CD4082BM CD4082BM96 CD4082BNSR CD4082BNSR Pins 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 14 14 14 14 14 14 14 14 24 24 24 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 109 TI Comments ON Semi Comments Obsolete 10/2/2001 Obsolete 10/2/2001 Obsolete 10/2/2001 Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR ON Semi to TI Root 14093 14093 14093 14093 14093 14093 14093 14093 14094 14094 14094 14094 14094 14094 14094 14099 14099 14099
HCT4094 TI Orderable Part # Logic N/A CD4075BE CD4075BM CD4075BM96 CD4075BE CD4075BM CD4075BM96 CD74HC4075E CD74HC4075M CD74HC4075M96 CD74HC4075M CD74HC4075M96 CD74HC4075E CD74HC4075E CD4076BE CD4076BM CD4076BM96 CD4076BE CD4076BM CD4076BM96 CD74HC4075NSR CD4077BE CD4077BM CD4077BM96 CD4077BE CD4077BM CD4077BM96 CD4078BE CD4078BM CD4078BM96 CD4078BE CD4078BM CD4078BM96 CD4081BE CD4081BM CD4081BM96 CD4081BE CD4081BM CD4081BM96 CD4082BE CD4082BM CD4082BM96 CD4082BE CD4082BM CD4082BM96 CD4085BE CD4085BM CD4085BM96 CD4086BE CD4086BM CD4086BM96 CD4089BE CD4093BM96 CD4093BE CD4093BE CD4093BM CD4093BM96 CD4093BM96 CD4093BE CD4093BM CD4093BM96 CD74HC4094M Logic N/A Logic N/A CD74HC4094M96 CD74HC4094E CD74HC4094PW CD74HC4094PWR CD74HCT4094M Logic N/A Logic N/A TI Comments This package -55 to 125C This package This package -55 to 125C -55 to 125C -55 to 125C -55 to 125C -55 to 125C This package This package Logic Cross-Reference by Device Competitor Philips Philips STM STM STM STM Philips Phil
UBPW CD4069UBPWR CD4069UBPWR CD4069UBNSR CD4069UBNSR CD4070BE CD4070BM CD4070BM96 CD4070BNSR CD4070BNSR CD4071BE CD4071BM CD4071BM96 CD4071BPW CD4071BPWR CD4071BNSR CD4071BNSR CD4073BE CD4073BM CD4073BM96 CD4073BNSR CD4073BNSR CD4076BE CD4076BM CD4076BM96 CD4077BE CD4077BM CD4077BM96 CD4077BNSR CD4077BNSR CD4081BE CD4081BM CD4081BM96 CD4081BPW CD4081BPWR CD4081BNSR CD4081BNSR CD4082BE CD4082BM CD4082BM96 CD4082BNSR CD4082BNSR Pins 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 14 14 14 14 14 14 14 14 24 24 24 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 109 TI Comments ON Semi Comments Obsolete 10/2/2001 Obsolete 10/2/2001 Obsolete 10/2/2001 Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR ON Semi to TI Root 14093 14093 14093 14093 14093 14093 14093 14093 14094 14094 14094 14094 14094 14094 14094 14099 14099 14099
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
UBPW CD4069UBPWR CD4069UBPWR CD4069UBNSR CD4069UBNSR CD4070BE CD4070BM CD4070BM96 CD4070BNSR CD4070BNSR CD4071BE CD4071BM CD4071BM96 CD4071BPW CD4071BPWR CD4071BNSR CD4071BNSR CD4073BE CD4073BM CD4073BM96 CD4073BNSR CD4073BNSR CD4076BE CD4076BM CD4076BM96 CD4077BE CD4077BM CD4077BM96 CD4077BNSR CD4077BNSR CD4081BE CD4081BM CD4081BM96 CD4081BPW CD4081BPWR CD4081BNSR CD4081BNSR CD4082BE CD4082BM CD4082BM96 CD4082BNSR CD4082BNSR Pins 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 14 14 14 14 14 14 14 14 24 24 24 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 TI Comments ON Semi Comments Obsolete 10/2/2001 Obsolete 10/2/2001 Obsolete 10/2/2001 Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR Not available in tubes, use NSR ON Semi to TI Root 14093 14093 14093 14093 14093 14093 14093 14093 14094 14094 14094 14094 14094 14094 14094 14099 14099 14099 1409
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
F HCF4006BF CD4006BF F4076BDM CD4076BF F4538BPC CD4538BE HCF4007UBD CD4007UBD F4076BPC CO4076BE F4543BDC CD4543BF HCF4007UBE CD4007UBE F4077BDC CD4077BF F4543BDM CD4543BF HCF4007UBF CD4007UBF F4077BDM CD40778F F4543BPC CD4543BE HCF4008BD CD40088D F4077BPC CD4077BE F4555BDC CD4555BF HCF4008BE CbD4008BE F4078BDC CD4078BF F4555BDM CD4555BF HCF4008BF CD4008BF F4078BDM CD4078BF F4555BPC CD45558E HCF4011BD CD4011BD F4078BPC CD4078BE F4556BDC CD4556BF HCF4011BE CD4011BECross-Reference Guide RCA RCA RCA Industry Replacement industry Replacement Industry Replacement Type Type Type Type Type Type HCF4011BF CD40118F HCF4030BD CD4030BD HCF4052BE CD4052BE HCF4012BD CD4012BD HCF4030BE CD4030BE HCF4052BF CD4052BF HCF4012BE CD4012BE HCF40308F CD40308F HCF4053BD CD40538D HCF4012BF CD4012BF HCF4031BD CD4031BD HCF4053BE CD4053BE HCF4013BD CD4013BD HCF4031BE CD4031BE HCF4053BF CD4053BF HCF4013BE CD4013BE HCF4031BF C04031BF HCF4054BD CD4054BD HCF4013BF CB4013BF HCF4032BD CD4032BD HCF4054BE CD4054B8E HCF4014BD CD4014B
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.
5 to 125 14 Ld PDIP CD4070BF -55 to 125 14 Ld CERDIP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BM -55 to 125 14 Ld SOIC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP Applications CD4077BF -55 to 125 14 Ld CERDIP * Logical Comparators CD4077BM -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices * Adders/Subtractors * Parity Generators and Checkers Description Pinouts CD4070B (PDIP, CERDIP, SOIC, SOP, TSSOP) TOP VIEW CD4077B (PDIP, CERDIP, SOIC, SOP, TSSOP) TOP VIEW A 1 14 VDD A 1 14 VDD B 2 13 H B 2 13 H J=AB 3 12 G J=AB 3 12 G K=CD 4 11 M = G H K=CD 4 11 M = G H C 5 10 L = E F C 5 10 L = E F D 6 9 F D 6 9 F VSS 7 8 E VSS 7 8 E CAUTION: These devices are sensitive to electrostatic discharge. U
Package Temperature Range - 100nA at 18V and 25oC CD4070BNSR -55 to 125 14 Ld SOP CD4070BPW -55 to 125 14 Ld TSSOP * Noise Margin (Over Full Package Temperature Range) - 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V CD4070BPWR -55 to 125 14 Ld TSSOP CD4077BE -55 to 125 14 Ld PDIP CD4077BF3A -55 to 125 14 Ld CERDIP CD4077BM -55 to 125 14 Ld SOIC CD4077BMT -55 to 125 14 Ld SOIC CD4077BM96 -55 to 125 14 Ld SOIC CD4077BNSR -55 to 125 14 Ld SOP CD4077BPW -55 to 125 14 Ld TSSOP CD4077BPWR -55 to 125 14 Ld TSSOP * Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices Applications * Logical Comparators * Adders/Subtractors * Parity Generators and Checkers Description The Harris CD4070B contains four independent ExclusiveOR gates. The Harris CD4077B contains four independent Exclusive-NOR gates. NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250.